Resistive Switching RRAM Architecture for Next‑Generation Non‑Volatile Memory | New Jersey Institute of Technology

Resistive Switching RRAM Architecture for Next‑Generation Non‑Volatile Memory

Resistive Switching RRAM Architecture for Next‑Generation Non‑Volatile Memory (Resistive Switching in a RRAM Device, Tech ID: 23‑003)

Technology Overview: This technology introduces a resistive random‑access memory (RRAM) device architecture based on controlled resistive switching mechanisms. The system enables stable, repeatable switching between resistance states, supporting high‑density, low‑power non‑volatile memory. The design is compatible with CMOS fabrication processes and is applicable to memory, neuromorphic computing, and in‑memory processing architectures.

Industry Pain Point: Conventional non‑volatile memory technologies face scaling, power, and endurance limitations.

NJIT Solution: This RRAM architecture enables low‑power, scalable memory with fast switching and high endurance.

Key Features & Advantages

  • Stable and repeatable resistive switching
  • Low power consumption
  • CMOS‑compatible fabrication
  • Suitable for neuromorphic and AI hardware

Development Stage: TRL 3–4 – Device‑level laboratory validation demonstrated.

Target Markets

  • Non‑volatile memory devices
  • AI and neuromorphic hardware
  • Semiconductor manufacturers

Market Opportunity

  • Global non‑volatile memory market (2026): ~$75B
  • CAGR: ~8–9%
  • Projected market size (2035): ~$130–140B

Commercial & IP Details

Inventors: Barsha Jain, Hieu Nguyen, Ravi Teja Velpula

Patent Information:
Category(s):
Computing, Communications & Photonics
For Information, Contact:
Ikechukwu Nwabufo
IP Licensing & Marketing Manager
in49@njit.edu
Inventors:
Hieu Nguyen
Ravi Teja Velpula
Barsha Jain
Keywords:
AI Hardware
CMOS-compatible Fabrication
Non-Volatile Memory Devices
Patent Pending
Reduced power consumption
Repeatable Resistive Switching
semiconductor