Architecture of a Memory-Memory-Memory CLOS-Network Packet Switch for Large-Scale Switchs Using Internally-Buffered Switches and Scheduling Schemes to Transmit Packets in Sequence.

Description:

https://www.google.com/patents/US8675673

Patent Information:
For Information, Contact:
Simon Nynens
VP, Business Incubation
New Jersey Institute of Technology
simon.nynens@njit.edu
Inventors:
Roberto Rojas-Cessa
Ziqian Dong
Keywords:
Patent Issued
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